Optimize inter-processor communication for dual-band dual-mode phones
With the advancement of globalization, today's global travel for business and leisure is very common; accompanied by the travel is to carry the necessary items for travel and emerging electronic products (gadget). Fortunately, the current mobile phone features are very rich, we no longer need to bring multiple devices such as MP3 players, portable navigation devices, video cameras and handheld video game consoles. The annual shipment of mobile phones exceeds 1 billion units, which has become a must-have product for people to go out. However, if you take your mobile phone to go abroad and cannot use it abroad, it is really a headache. Countries such as Japan and South Korea differ from most European countries in that they only support GSM. They use CDMA and FOMA standards. Many other countries support both different standards, GSM and CDMA, but the specific standard depends on the subscribed telecommunications operator. Therefore, a mobile phone may not meet the requirements for worldwide use. Many travelers eventually had to bring two mobile phones or buy a new SIM card at the airport, and then e-mail the new phone number to friends and colleagues.
As mobile phone manufacturers compete to launch the "global" roaming features that users want, this inconvenience has led to the development of dual-band dual-mode (DBDM) mobile phones that can support true global availability. A DBDM mobile phone is a mobile phone that includes two different baseband processors. It has two slots, one can insert a SIM card to support GSM channels, and the other is used to insert a removable subscriber identification module (RUIM) to support CDMA channels. However, some mobile phones whose circuit boards have integrated CDMA function blocks may only have one slot for inserting a GSM SIM card. The main mobile phone manufacturers currently pushing "global mobile phones" in their product lines include RIM, Samsung, LG, Motorola, etc.
In addition to processing predetermined CDMA and GSM signals, each baseband processor is also responsible for performing its specific tasks in the mobile phone, including supporting simple applications such as keypads and LEDs, and even operating complex functions such as LCD screens, cameras, and video processing. Because both discrete processors must receive signals and perform various other application tasks separately, you must ensure that data is efficiently transferred between the two processors to avoid end users feeling delays in use. May reduce the impact on battery life, even not. With the application of high-resolution mobile phone cameras and video streaming technology in mobile phones, the file size of mobile phones continues to increase, and the data transmission rate is getting faster and faster. This requires further data processing efficiency between these two discrete processors. When we access the pictures or videos stored in the mobile phone, don't we often have headaches because the mobile phone has not responded for a long time? What caused this?
With the rapid development of telecommunications technology, the wireless data transmission rate has developed from the Kbps level of 2.5 / 2.75G mobile phones in the past to the current Mbps level of 3.5G HSPA mobile phones. WiMax, WiBro, LTE, UMB and other mobile communication standards currently in trial will further increase the data transmission rate. In order to meet the higher speed requirements put forward by the new standard, the processing power of the processor is constantly improving, and the cellular network is constantly being upgraded to adapt to the exponential increase in data transmission rate.
Although the processing power of the baseband processor is improved and the data transmission rate of the cellular network is accelerated, the internal architecture of the mobile phone itself is still very backward, which limits the best function of the mobile phone. Compared with the exponential development of the technology of the cellular phone industry, the development of the mobile phone itself in the telecommunications field lags behind. At present, our baseband processor and application processor can process up to one million instructions per second (MIPS), and the data transmission rate of HSPA mobile phones can reach 10Mbps or even higher. However, despite concentrating on improving processor capabilities and wireless data transfer rates, inter-processor communication has always been a big bottleneck. Many mobile phone designers face this problem. Even with the latest and most powerful processors and chipsets, they have failed to effectively improve the performance of mobile phone products.
Current solutions and their shortcomings
The current mobile phone architecture uses multiple inter-processor communication technologies. The current popular direct interfaces include SPI, I2C, UART and USB.
Although SPI can support data transfer rates above 20Mbps, there is no uniform specification, so it mainly depends on what kind of processor is used. If a baseband processor is used, SPI can generally support a data transfer rate of about 16Mbps. Since many baseband processor manufacturers have launched their own patented products, different SPI interfaces on different baseband processors will present different challenges to designers. It is difficult to successfully pair two different baseband processors to achieve the best SPI speed.
On the other hand, although the latest I2C specification proposes a high-speed mode with a throughput of up to 3.4Mbps, most of the devices currently available can only support data transmission rates of 400Kbps to 1Mbps. At this rate, I2C is too slow for current telecommunications needs.
The third type of interconnection technology in mobile phones is UART. The typical data transmission rate of UART is about 1.5Mbps, while high-speed UART supports up to 5Mbps. However, this data transmission rate still cannot meet the requirements of high-bandwidth communication between processors.
One of the more popular interconnection technologies is the universal serial bus (USB) interface. Most processors have full-speed USB (FS-USB) performance. The maximum data transfer rate of FS-USB is 12Mbps. Due to the high packet overhead of the USB protocol itself, its actual throughput is about 6Mbps. In addition, most baseband processors do not have USB host functionality, which is necessary for USB solutions. Therefore, we must build in additional USB host functions. USB connection technology can not only meet the current data transmission rate requirements of HSPA mobile phones, but also increase power consumption. This is because the USB host always keeps working even when it is not transmitting data. In addition, the number of USB ports available on the baseband processor is usually limited because USB is also the de facto standard for connecting a mobile phone to a PC.
Previously, in terms of text messages and simple data transmission on slower networks, the above interconnection technology was basically sufficient. However, since the data transmission speed of HSPA mobile phones can reach 14.4Mbps or even higher, these currently popular interfaces will be difficult to support the required throughput in an efficient and optimal manner.
So, how can designers meet the current demand for higher throughput of mobile phones?
Alternative solutions and their advantages
One potential solution to the interconnection problem between processors is to use multi-port interconnection technology, which is also a technology currently used by many DBDM architectures. In the DBDM architecture, a buffered multi-port device as an interconnection mechanism between two CPUs can support high-speed data transmission between the two, and also help reduce the power consumption of inter-processor communication (IPC).
speed
The most obvious advantage of using multi-port interconnect technology is high speed. The access time of the dual-port memory is only 40ns, which can support data transmission speeds of up to 400Mbps, which is not only sufficient to meet the current HSPA mobile phone requirements, but also lays a solid foundation for further improvement of throughput requirements in the future (such as the LTE standard) . As mobile phone technology becomes more complex, the amount of data transferred between processors will definitely increase. Using multi-port interconnect technology, mobile phone designers will no longer be troubled by communication bottlenecks during processing.
Power consumption
In addition to high speed, low power consumption is also a key requirement for DBDM mobile phones. If both baseband processors are required to maintain working status during the entire IPC period (like SPI, UART, I2C, or USB), then battery life will definitely be affected. In addition to this, maintaining communication between processors also takes up their own dedicated resources, thereby reducing processor performance.
The multi-port solution supports passive communication between processors. The processor can write to the multi-port interconnect as needed, and then enter sleep mode. Another baseband processor can access data at a convenient time as needed. Because the multi-port interconnection mechanism acts as a buffer, the receiver processor can stay in sleep mode until the multi-port interconnection interrupt is received, and only enter the working state when it needs to receive data.
Let ’s take a look at the following example to compare the multi-port IPC solution with the FS-USB-based IPC solution. The FS-USB solution with an actual throughput of 6Mbps takes 1 minute and 20 seconds to transfer 480Mb (60MB) data or 10 MP3 songs, while using the multi-port interconnect technology to transfer the same amount of data only takes 5 seconds (assuming the actual Throughput is 100Mbps). A typical baseband processor with a core voltage of 1.2V consumes 120mW during operation and 0.24mW in sleep mode. If the two processors have been working during the IPC of 80 seconds, the power consumption of the solution using USB is 5.33mWH [(120x2) x 80/3600], while the multi-port technology has only One processor works, and the total battery consumption of the processor plus multi-port interconnection (~ 27mW) is only 0.743mWH [(((120 + 0.24) x 2) + 27) x 10/3600]. In other words, during an IPC, we achieved 85% of the power saving effect. As people use mobile phones to download music, pictures, emails, and browse the Internet more and more, this power saving function will definitely play a huge role. .
flexibility
Another advantage of interconnection buffering is that the use of multi-port devices to implement IPC does not require software drivers, which allows mobile phone manufacturers to launch different models of products for different regions without modifying the overall software IPC architecture. This improves the flexibility of manufacturers to use different operating systems on different processors, and can flexibly select processors according to system requirements without having to be limited by IPC.
Single chip solution
The recently launched single-chip solution includes selected frequency bands for GSM and CDMA, which is an interesting new development. In this solution, because all the necessary functions are integrated on a single chip, there are usually trade-offs in features and performance. This kind of processor is relatively new and has not been fully tested by the market. Most manufacturers still want to use proven solutions and usually do not want to compromise on performance requirements. Therefore, in terms of improving the network transmission rate and meeting the characteristics, the dual-processor architecture is an ideal choice.
in conclusion
With the development of HSPA mobile phones and the improvement of the quality of video and digital content, this will in the near future lead to the revolutionary development of inter-processor communication architectures. The traditional interconnection mechanism is no longer suitable for the data throughput requirements of the baseband processor, nor can it meet the requirements for the future development of mobile communication standards. Some mobile phone designers have begun to recognize this unresolved issue, and have begun to adopt low-power multi-port interconnection technology in DBDM mobile phones. Multi-port interconnect technology can not only support the high bandwidth and low power requirements of current mobile phone design solutions, but also help designers flexibly launch mobile phones with lower cost, higher quality and faster time to market
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