Low-voltage power line carrier communication interface extension based on PL2101

The interface circuit of the early low-voltage power line carrier communication chip is relatively complex and has poor anti-interference ability, and most of them are foreign products, and the cost performance is low. Therefore, the single-chip system rarely uses low-voltage power line carrier communication. With the development of communication technology, the new low-voltage power line carrier communication interface chip solves the above shortcomings, making the single-chip system using low-voltage power line carrier communication easy to use.

Introduction to PL2101

PL2101 uses two-phase phase shift keying, carrier frequency 120KHz, bandwidth 15KHz, transmission rate 500bps. It is powered by a single +5V power supply, has a simple interface with the microcontroller, and the peripheral analog transmit/receive circuitry is simpler, eliminating the need for an external analog mixer. The PL2101 has five practical functional circuits: clock circuit, 32 Bytes SRAM, voltage monitoring, watchdog timer and reset circuit. Among them, the clock and SRAM can be powered by the 3V backup battery after the main power is turned off.

Using PL2101 to expand single-chip low-voltage power line carrier communication interface

Hardware circuit design

The PL2101's half-duplex transceiver control terminal, HEAD (data synchronization terminal), RXD_TXD (half-duplex data transceiver, data input/output terminal) pins are used to transmit and receive data with the MCU and DSP processor to realize low-voltage power line carrier communication. The internal registers of PL2101 use standard I2C interface (operated by SCL and SDA pins; in addition, WDI of PL2101 (watchdog counter clear input), RESET (power-on and watchdog counter overflow reset output) and PFo (power failure indication terminal) is used to monitor the working status of PL2101 by the MCU.

The principle of using PL2101 to extend the low-voltage power line carrier communication interface for MSP430 MCU. For the interface part of PL2101 and MSP430F149, the peripheral analog transmit/receive circuit of PL2101 can refer to the typical circuit of the chip manual. Use the P1 port of the MSP430F149 to connect to the 8 pins of the PL2101. Use the pin P1.6 of the P1 port of the MSP430F149 with interrupt function to connect HEAD to transmit/receive the data of PL2101 in the interrupt mode. Since the MSP430F149 does not integrate the I2C bus interface, the MSP430F149 is referenced by P1.2 and P1.3. The foot software emulates the I2C timing to access the internal registers of the PL2101. In addition, since the MSP430F149 uses a 3.3V logic level, the PL2101 uses a 5V COMS logic level, so it cannot be directly connected to the pin and requires level shifting.

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